Design target

From TriPU

These are the specs that TriPU shall obey:

Overall architecture

TriPU will be an 8 bit processor. 4 bit are just not enough to do anything useful ;-) and 16 bit are not very much fun when it comes to wiring. 8 bit were enough to go to the moon, it ought to be enough for me :-)

Registers

The registers are inspired by the sparc architectur. Application code will see 64 registers, which are divided like this:

• register 0-15: global registers. Always visible, always the same. Shouldn't be used by applications very much, useful for interrupt handlers.
• register 16-31: in registers. They should contain the input parameters for a function, may be changed by the callee.
• register 32-47: local registers. A function may do whatever it has to do here.
• register 48-64: out registers. A function may use these but whenever it calls another function it must not assume unchanged out registers. The main purpose is to put parameters for the callee in these registers, who will see these as the in registers.

When a call occurs, the registers are moved (actually a pointer in the register memory), the out registers become in registers, 8 new local registers are allocated etc. TriPU shall allow about 256 register window movements, when reaching the last window (255, overlapping with the globals) an interrupt should be issued so that the OS may save the registers.

Instruction format

Instructions are composed of 32 Bits or 4 Bytes. The format itself is described on instruction encoding.

Memory

To come...

External bus

To come....